1. Field of the Invention
The present invention generally relates to data processing techniques and, in particular, to a system and method for reducing the adverse impact of assertion instructions to processor performance so that programmers will be encouraged to include assertion instructions in computer programs.
2. Related Art
Computer programmers often insert assertions into computer code to help ensure that the computer code runs free of errors. An assertion is a Boolean statement used in a computer program to test a condition that, if the program is operating correctly, should always evaluate to a certain logic level (e.g., should always evaluate as true or should always evaluate as false). Therefore, if the tested condition evaluates to another logic level, then the assertion test fails, and it is known that an error in the execution of the program has occurred. When an assertion test fails, the program is typically terminated, and an appropriate error message is generated.
Although assertion testing helps to ensure correct operability of a running computer program, the inclusion of assertion instructions (i.e., instructions that perform assertion testing) in the computer program reduces performance. In particular, the execution of assertion instructions consumes processor time, yet the assertion instructions do not affect the functionality of a correctly operating computer program. In this regard, assertion testing affects the functionality of a program only when the assertion test fails, and the assertion test should never fail, if the program is operating properly.
As a result, many computer programmers insert assertion instructions into a computer program and utilize the assertion instructions only when testing or debugging the computer program. After the testing or debugging phase, the computer programmer will recompile the program into a version that does not include instructions for performing assertion testing. In this regard, most compilers provide an option for removing assertion instructions from the program being compiled. When the programmer selects to have the assertion instructions removed, the compiler ignores the assertion instructions in the source program. Therefore, the compiled version of the source program does not include instructions that have been translated from the assertion instructions included in the source program.
Consequently, when the compiled program executes, no assertion testing is performed, thereby maximizing the efficiency of a processor in executing the compiled program. However, even though the compiled program has already been tested and debugged at this point, it is possible for the program to include bugs that were not detected during the testing and debugging phases. These bugs may cause errors detectable by assertion instructions had the assertion instructions not been removed at compile time. Therefore, the optimized performance of running the program without assertion testing may allow the occurrence of an error that otherwise would have been detected by the assertion testing.
Thus, a heretofore unaddressed need exists in the industry for providing a system and method of reducing the adverse impact of assertion instructions to processor performance such that assertion instructions may be included in a program without significantly affecting the processor""s performance in executing the program.
The present invention overcomes the inadequacies and deficiencies of the prior art as discussed hereinbefore. Generally, the present invention relates to a system and method for reducing the adverse impact of assertion instructions to processor performance so that programmers will be encouraged to include assertion instructions in computer programs.
In architecture, the system of the present invention includes memory and a compiler. The memory stores a first program to be compiled by the compiler. The compiler, in compiling the first program, translates a first function of the first program into a second function of a second program. The first function has assertion instructions that are translated by the compiler into translated assertion instructions, which are included in the second function. In compiling the first program, the compiler enables selective execution, based on a run time input, of a portion of the translated assertion instructions that are included in the second function.
The present invention can also be viewed as providing a method for enabling selective assertion testing of computer programs based on run time inputs. The method can be broadly conceptualized by the following steps: translating a first function of a first computer program into a second function of a second computer program, the first function having assertion instructions, the second function having translated assertion instructions translated from the assertion instructions of the first function; detecting stall locations within the second function of said second computer program; inserting one of the translated assertion instructions into one of the stall locations in response to a detection of the one stall location in the detecting step; inserting a block of the translated assertion instructions into the second function; and enabling selective execution of the block of translated assertion instructions based on a run time input.